Intel® C++ Compiler 16.0 User and Reference Guide
Tells the compiler which processor features it may target, including which instruction sets and optimizations it may generate.
Not available on Intel® 64 architecture targeting the Intel® Xeon Phi™ coprocessor x100 product family (formerly code name Knights Corner), on IA-32 architecture targeting Intel® Graphics Technology, or on Intel® 64 architecture targeting Intel® Graphics Technology
Linux and OS X: | -xcode |
Windows: | /Qxcode |
code |
Indicates to the compiler a feature set that it may target, including which instruction sets and optimizations it may generate. Many of the following descriptions refer to Intel® Streaming SIMD Extensions (Intel® SSE) and Supplemental Streaming SIMD Extensions (Intel® SSSE). Possible values are:
You can also specify Host. For more information, see option [Q]xHost. |
Windows* systems: None |
On Windows systems, if neither /Qx nor /arch is specified, the default is /arch:SSE2. On Linux systems, if neither -x nor -m is specified, the default is -msse2. |
This option tells the compiler which processor features it may target, including which instruction sets and optimizations it may generate. It also enables optimizations in addition to Intel feature-specific optimizations.
The specialized code generated by this option may only run on a subset of Intel® processors.
The resulting executables created from these option code values can only be run on Intel® processors that support the indicated instruction set.
The binaries produced by these code values will run on Intel® processors that support the specified features.
Do not use code values to create binaries that will execute on a processor that is not compatible with the targeted processor. The resulting program may fail with an illegal instruction exception or display other unexpected behavior.
Compiling the function main() with any of the code values produces binaries that display a fatal run-time error if they are executed on unsupported processors, including all non-Intel processors.
Compiler options m and arch produce binaries that should run on processors not made by Intel that implement the same capabilities as the corresponding Intel® processors.
The -x and /Qx options enable additional optimizations not enabled with options -m or /arch (nor with options –ax and /Qax).
On Windows* systems, options /Qx and /arch are mutually exclusive. If both are specified, the compiler uses the last one specified and generates a warning. Similarly, on Linux* and OS X* systems, options -x and -m are mutually exclusive. If both are specified, the compiler uses the last one specified and generates a warning.
All settings except SSE2 do a CPU check.
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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 |
Visual Studio: Code Generation > Intel Processor-Specific Optimization
Eclipse: Code Generation > Intel Processor-Specific Optimization
Xcode: Optimization > (multiple values)
None