Intel® C++ Compiler 16.0 User and Reference Guide
Performs an atomic read-modify-write operation. This topic only applies to Intel® 64 and IA-32 architectures targeting Intel® Graphics Technology.
int _gfx_atomic_write_i32(__GfxAtomicOpType op_type, int* ptr, unsigned int offset, int src0, int src1);
op_type |
The type of the operation. It must be one of the values from the enum type __GfxAtomicOpType. The values are listed in the table below, where old_dst designates the memory value at ptr+offset before the operation:
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ptr |
The base pointer for destination. |
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offset |
The offset of the destination from the base pointer where the atomic read-modify-write operation occurs. Notice that the offset is in the element type sizeof of the destination value. |
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src0 |
The first of up to two sources. Notice that this parameter is ignored for the operations GFX_ATOMIC_INC and GFX_ATOMIC_DEC. |
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src1 |
The second of up to two sources. Notice that this parameter is ignored for all operations but GFX_ATOMIC_CMPXCHG. |
This function performs the atomic read-modify-write operation indicated by op_type. The base pointer ptr and the offset from the base pointer, offset specify the memory addresses on which the operation is performed.
The function computes the new value of the destination based on up to two sources, src0 and src1, and the previous value of the destination old_dst. The specific usage of these arguments depends on the operation defined by op_type.
This function can be used in a vector context, such as in array notation of a vector loop, where the compiler will vectorize the intrinsic and it will perform its operations on multiple memory locations in parallel. In this case, ptr is assumed to be uniform, meaning it has the same value for all vector loop iterations. The calls to the function from different iterations of the vector loop can point to the same memory location, that is, use the same offset value, in that case the hardware will correctly serialize the operations.
The value at the memory location before the write operation.