Intel® C++ Compiler 16.0 User and Reference Guide

Cacheability Support Intrinsic

The prototype for this Intel® Streaming SIMD Extensions (Intel® SSE4) intrinsic is in the smmintrin.h file.

_mm_stream_load_si128

extern __m128i _mm_stream_load_si128(__m128i* v1);

Loads __m128 data from a 16-byte aligned address, v1, to the destination operand, m128i without polluting the caches.

Corresponding instruction: MOVNTDQA